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Thursday, May 5, 2011

Intel Begins New 3-D Transistor Design

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Intel embraces new chip design

Use of 3-D will allow for smaller, faster, lower-power computer chips, company says.
By JOHN MARKOFF • New York Times 
May 5, 2011
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HILLSBORO, Ore. • Intel announced on Wednesday that by building a critical portion of a microprocessor's transistor above the chip's surface, it has found a way to make smaller, faster and lower-power computer chips.
Intel intends to break with the basic design of the so-called planar transistor that has remained a constant in the chip industry since 1959 when Robert Noyce, Intel's co-founder, and Jack Kilby of Texas Instruments independently invented the first integrated circuits.
Since the advent of the microchip, the transistor, which is the electronic switch that is the basic building block of the information age, has been manufactured in just two dimensions.
But now, when the space between the billions of tiny electronic switches on the flat surface of a computer chip is measured in the width of just dozens of atoms, designers are increasingly turning to the third dimension to find more room.
The company has already begun making its microprocessors using this new 3-D transistor design, called a Finfet (for fin field-effect transistor), which is based around a remarkably small pillar, or fin, of silicon that rises above the surface of the chip.
Intel, based in Santa Clara, Calif., plans to enter general production based on the new technology sometime this year.
The company did not give technical details about its new process in its Wednesday announcement. But it said it expected to be able to make chips that run as much as 37 percent faster in low-voltage applications and would be able to cut power consumption as much as 50 percent.
Intel currently uses a photolithographic process to make a chip, in which the smallest feature on the chip is just 32 nanometers, a level of microscopic manufacture that was reached in 2009. (By comparison, a human red blood cell is 7,500 nanometers in width, and a strand of DNA is 2.5 nanometers.)
"Intel is on track for 22-nanometer manufacturing later this year," said Mark Bohr, an Intel senior fellow and the scientist who has overseen the effort to develop the next generation of smaller transistors.
The company's engineers said they felt confident that they would be able to solve the challenges of making chips through at least the 10-nanometer generation, which is likely to happen in 2015.
The timing of the announcement Wednesday is significant, Bohr said, because it is evidence that the world's largest chipmaker is not slipping from the pace of doubling the number of transistors that can be etched onto a sliver of silicon every two years, a phenomenon known as Moore's Law.
Although not a law of physics, the 1965 observation by Intel's co-founder, Gordon Moore, has defined the speed of innovation for much of the world's economy.
It has also set the computing industry apart from other types of manufacturing because it has continued to improve at an accelerating rate, offering greater computing power and lower cost at regular intervals.
However, despite its promise and the company's bold claims, Intel's 3-D transistor is still a controversial technology within the chip industry. Indeed, a number of the company's competitors say they believe that Intel is taking a what could be a disastrous multibillion-dollar gamble on an unproven technology.

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